| PART |
Description |
Maker |
| MC100ES6014 MC100ES6014EJR2 MC100ES6014DT MC100ES6 |
2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver
2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver
|
FREESCALE[Freescale Semiconductor, Inc]
Freescale Semiconductors
|
| MC100ES6139 MC100ES6139DT MC100ES6139DTR2 MC100ES6 |
3.3V ECL/PECL/HSTL/LVDS 2/4, 4/6 Clock Generation Chip
|
Freescale (Motorola)
Freescale Semiconductor, Inc
|
| AZ100LVE111E |
ECL/PECL 1:9 Differential Clock Driver with Enable ECL / PECL:9差分时钟驱动器，带有启用
|
Arizona Microtek, Inc.
|
| AZ100LVE111FN |
ECL/PECL 1:9 Differential Clock Driver ECL / PECL:9差分时钟驱动
|
Arizona Microtek, Inc.
|
| MAX9427 MAX9424 MAX9425 MAX9426 MAX9424EGJ MAX9424 |
Lowest Jitter Quad PECL-to-ECL Differential Translators QUAD PECL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, CQCC32
|
Maxim Integrated Products, Inc.
MAXIM[Maxim Integrated Products]
|
| MC100EL90DW MC100EL90DWG MC100EL90DWR2 MC100EL90DW |
-3.3V / -5V Triple ECL Input to PECL Output Translator; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38 TRIPLE ECL TO PECL TRANSLATOR, COMPLEMENTARY OUTPUT, PDSO20
−3.3V / −5V Triple ECL Input to PECL Output Translator
|
ONSEMI[ON Semiconductor]
|
| MAX9389 |
Differential 8:1 ECL/PECL Multiplexer with Dual Output Buffers
|
Maxim
|
| AZHEL11 AZM100EL11 AZ100EL11D |
ECL/PECL 1:2 Differential Fanout Buffer ECL / PECL的差:2扇出缓冲
|
Electronic Theatre Controls, Inc.
ETC
|
| MPV5J80B1QJ |
9x14 mm, 5.0 Volt, PECL/LVDS VCXO 9x14毫米5.0伏，PECL LVDS的石英振荡器
|
MtronPTI
|
| AZ100LVEL33NG AZ10/100LVEL33L |
ECL/PECL ±4 Divider ECL / PECL的4分频
|
Arizona Microtek, Inc.
|
| AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
|
Motorola
ONSEMI[ON Semiconductor]
|
| MDU12H-4MC3 MDU12H-250MC3 MDU12H-150MC3 MDU12H-30M |
Delay 200 /-10 ns, dual, ECL-interfaced fixed delay line
Delay 150 /-7.5 ns, dual, ECL-interfaced fixed delay line
Delay 250 /-12.5 ns, dual, ECL-interfaced fixed delay line
Delay 125 /-6.2 ns, dual, ECL-interfaced fixed delay line
Delay 100 /-5 ns, dual, ECL-interfaced fixed delay line
DUAL, ECL-INTERFACED FIXED DELAY LINE (SERIES MDU12H) ACTIVE DELAY LINE, TRUE OUTPUT, DSO16
|
DATA DELAY DEVICES INC
Data Delay Devices, Inc.
|
